Gabriele Boschi is a Senior Functional Safety Architect.
He has worked on Functional Safety at Yogitech company and then at Intel for a total of 17+ years.
As part of the Yogitech experience, he worked in Functional Safety methodologies definition, on Functional Safety HW Soft IP and FW Test (SBST) Libraries products development, on roadmap and architecture definition, project management and product development. The IPs and Libraries were licensed to worldwide semiconductor and systems-development companies. He also was the architect of the first commercial SIL3-certified asymmetric redundant CPU (the so-called “fRCPU_armcm3”).
At Intel he now covers the role of Functional Safety Platform Architect, and is involved into activities on innovative Intel products.
He has authored several scientific papers and patents.